Experimental Assessment of Fault Coverage for Fault-Tolerant High-Performance Processors
نویسندگان
چکیده
⎯ In this paper, we present a comprehensive experimental assessment of fault coverage for a fault-tolerant VLIW processor, which consists of the error detection, error rollback recovery and reconfiguration mechanisms. We implement the proposed design of fault-tolerant VLIW in VHDL and employ the fault injection to investigate the effects of fault duration, workload variation and the number of recovery process allowed on the relevant design metrics, such as performance degradation, error detection/recovery coverage and fail-safe and fail-unsafe probabilities.
منابع مشابه
Fault tolerant system with imperfect coverage, reboot and server vacation
This study is concerned with the performance modeling of a fault tolerant system consisting of operating units supported by a combination of warm and cold spares. The on-line as well as warm standby units are subject to failures and are send for the repair to a repair facility having single repairman which is prone to failure. If the failed unit is not detected, the system enters into an unsafe...
متن کاملStability Assessment Metamorphic Approach (SAMA) for Effective Scheduling based on Fault Tolerance in Computational Grid
Grid Computing allows coordinated and controlled resource sharing and problem solving in multi-institutional, dynamic virtual organizations. Moreover, fault tolerance and task scheduling is an important issue for large scale computational grid because of its unreliable nature of grid resources. Commonly exploited techniques to realize fault tolerance is periodic Checkpointing that periodically ...
متن کاملReliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures (RESEARCH NOTE)
Nowadays, faults and failures are increasing especially in complex systems such as Network-on-Chip (NoC) based Systems-on-a-Chip due to the increasing susceptibility and decreasing feature sizes. On the other hand, fault-tolerant routing algorithms have an evident effect on tolerating permanent faults and improving the reliability of a Network-on-Chip based system. This paper presents reliabili...
متن کاملExperimental Fault-Tolerant Synchronization for Reliable Computation on Graphics Processors
Graphics processors (GPUs) are emerging as a promising platform for highly parallel, compute-intensive, general-purpose computations, which usually need support for inter-process synchronization. Using the traditional lock-based synchronization (e.g. mutual exclusion) makes the computation vulnerable to faults caused by both scientists’ inexperience and hardware transient errors. It is notoriou...
متن کاملFault-tolerant architecture for high performance embedded system applications
The architecture of a fault-tolerant embedded computer system is presented. It employs multiple processors for high performance and dual-port memory units for interprocessor communication. The high performance embedded computer (HPEC) system consists of five processors that are partitioned into two sets namely the computing and IO partitions. The computing partition is concerned with computatio...
متن کامل